A monolayer SnS2 Dirac source field-effect transistor: a promising low-power device superior to its MOSFET counterpart.

The Dirac source field-effect transistor (DSFET) is a steep-slope device designed to reduce power consumption in modern electronics. We simulate an n-type monolayer SnS2 DSFET with a graphene source using ab initio quantum transport simulation. The graphene/SnS2 heterojunction forms a stable n-type ohmic contact with 2.80% tunneling probability and a low tunneling-specific resistivity of 2.08 × 10-9 Ω cm2, enabling efficient electron injection. Meanwhile, the p-type-doped Dirac cone in the graphene source causes superexponential decay of electron density, strongly suppressing the thermal tail. Consequently, the 5 nm-gate DSFET outperforms its MOSFET counterpart in low-power (LP) applications: its on-current (461 μA μm-1) is more than twice that of the MOSFET (207 μA μm-1), reaching 64% of the IRDS 10 nm LP target, and its delay and power dissipation beat IRDS benchmarks. These results highlight the critical role of the cold-source/channel contact and confirm that the ML SnS2 DSFET is a viable beyond-MOSFET solution for LP electronics.