Integration of high-κ oxide on 2D semiconductors with carbon-dot monolayer assembly as van der Waals interfacial layer.

The atomically smooth surfaces of two-dimensional (2D) nanomaterials minimise scattering-induced carrier-transport degradation. However, this same attribute poses a major challenge for integrating 2D materials with high-quality dielectrics at sub-nanometre equivalent oxide thickness (EOT) through direct growth. Here we show that atomically thin carbon dots with diameters of a few nanometres assemble into a closely packed monolayer on 2D materials without hybridizing with the underneath graphene or molybdenum disulfide (MoS2) channels. This atomically thin assembly forms a van der Waals interfacial layer that enables deposition of ultrathin high-κ oxides to afford a smooth, thermally stable hybrid dielectric with an EOT down to 0.6 ± 0.1 nm, leakage current density below 10-4 A·cm-2, and a breakdown field of 28 MV·cm-1. Leveraging this approach, we fabricate top-gated MoS2 transistors with a subthreshold swing approaching 60 mV·dec-1, hysteresis below 30 mV, near-zero threshold voltage (VT) for enhancement-mode operation, and excellent bias-stress stability with VT drift under 25 mV, allowing integration into logic circuits operating at a low drive voltage of 0.5 V.